Designing an impedance controlled PCB becomes necessary when your circuit operates at frequencies where the physical length of traces is a significant fraction of the signal wavelength, or when you need to match the impedance of your PCB traces to a transmission line (coaxial cable, antenna, etc.). This guide explains when impedance control is needed, how to calculate the required trace width, and how to specify it when ordering from JLCPCB or other manufacturers in India.
Table of Contents
- What is Impedance Controlled PCB?
- When Do You Need Impedance Control?
- Transmission Line Trace Types
- Impedance Calculation: Tools and Formulas
- Ordering Impedance Controlled PCB from JLCPCB
- Design Tips for Controlled Impedance Traces
- Testing and Validation
- Frequently Asked Questions
What is Impedance Controlled PCB?
Impedance control refers to managing the characteristic impedance (Z₀) of PCB transmission lines to a specified value — typically 50 ohms for RF traces, 90 ohms for USB differential pairs, 100 ohms for Ethernet, or 85 ohms for PCIe. The characteristic impedance of a PCB trace depends on its width, the dielectric constant (εr) of the PCB material, and the distance to the reference plane (GND or PWR).
When PCB manufacturers offer impedance control, they adjust trace widths during production to hit your specified impedance (±10% or ±5% tolerance) based on their measured dielectric properties. Without impedance control, you specify a trace width based on calculations — but actual manufactured impedance may deviate by 10-20% due to manufacturing tolerances in copper thickness and dielectric properties.
When Do You Need Impedance Control?
As a practical rule: impedance control is needed when signal rise time is comparable to or shorter than 2 × propagation delay of the trace:
Rule of thumb for when impedance control is needed:
Propagation delay on FR4 PCB: ~150 ps/inch (6 ps/mm)
For a 50mm trace: propagation delay = 50mm × 6ps/mm = 300 ps
If signal rise time < 2 × trace propagation delay:
= < 600 ps = impedance control required
Typical rise times by signal type:
16 MHz Arduino signals: ~10 ns rise time → No impedance control
100 MHz ARM Cortex-M4: ~1-2 ns rise time → Consider for long traces
USB 2.0 (480 Mbps): ~0.5 ns rise time → Impedance control needed
USB 3.0 (5 Gbps): ~0.1 ns rise time → Definitely needed
PCIe Gen 3 (8 Gbps): ~0.05 ns rise time → Critical
Antenna traces: All RF frequencies → Always neededSignals Requiring Impedance Control
- RF antenna traces: 50 ohm microstrip (WiFi, Bluetooth, LoRa, ZigBee, GSM modules)
- USB 2.0 differential pair: 90 ohms differential (most MCU USB designs)
- USB 3.0/3.1: 85 ohms differential
- HDMI: 100 ohms differential (TMDS pairs)
- Ethernet (100BASE-TX): 100 ohms differential
- PCIe: 85 ohms differential
- DDR3/DDR4 memory: 40 ohms single-ended, 80 ohms differential
- LVDS: 100 ohms differential
Signals That Do NOT Need Impedance Control
- GPIO signals below 50 MHz on short traces (<10mm)
- I2C, SPI at standard speeds (<10 MHz) on short traces
- Power and ground traces
- All signals on boards where highest frequency is below ~100 MHz with trace lengths under 25mm
Transmission Line Trace Types
Four common transmission line configurations in PCB design:
- Microstrip: Trace on outer layer with GND plane on inner layer. Most common for RF and high-speed single-ended signals. Z₀ = 50 ohm typically.
- Stripline: Trace on inner layer sandwiched between two GND planes. Better EMI shielding. Used in 4+ layer boards for critical signals.
- Coplanar Waveguide (GCPW): Trace with GND copper fill on same layer, plus GND plane below. Used for RF signals requiring better isolation.
- Differential Pair: Two parallel traces carrying complementary signals. Impedance spec is for the differential mode (Zdiff = 2 × Z₀_single for uncoupled pairs).
Impedance Calculation: Tools and Formulas
Microstrip Impedance (simplified IPC-2141A formula):
Z₀ = (87 / sqrt(εr + 1.41)) × ln(5.98 × H / (0.8 × W + T))
Where:
εr = Dielectric constant of PCB (FR4: 4.2-4.6, use 4.4)
H = Height of dielectric above GND plane (mm)
W = Trace width (mm)
T = Trace thickness (mm) = copper weight × 35μm/oz
ln = natural logarithm
For JLCPCB standard 2-layer, 1.6mm board, 1oz copper:
H = 1.5mm (total thickness - 0.035mm copper × 2 - solder mask)
Approximate H ≈ 1.53mm
T = 0.035mm (1 oz copper)
εr = 4.4 (FR4 typical)
Solving for W to achieve Z₀ = 50 ohm:
50 = (87 / sqrt(5.41)) × ln(5.98 × 1.53 / (0.8W + 0.035))
50 = 37.4 × ln(9.149 / (0.8W + 0.035))
ln(9.149 / (0.8W + 0.035)) = 1.337
9.149 / (0.8W + 0.035) = e^1.337 = 3.808
0.8W + 0.035 = 2.403
W = 2.96mm ≈ 3.0mm for 50-ohm microstrip on 1.6mm 2-layer FR4
For JLCPCB 4-layer (F.Cu to In1 = 0.21mm prepreg):
H = 0.21mm
Solving for W: W ≈ 0.127mm for 50-ohm microstrip
(matches JLCPCB's stated 50-ohm trace width for their standard stackup)Recommended calculators for Indian designers:
- Saturn PCB Toolkit (free, Windows): Most accurate, accounts for all PCB parameters
- Chemandy Electronics online calculator (free, web-based)
- JLCPCB’s own impedance calculator on their website (uses their actual stackup data — most accurate for JLCPCB orders)
Ordering Impedance Controlled PCB from JLCPCB
- Visit jlcpcb.com and upload your Gerber files as normal
- Select your board parameters
- Scroll to “Impedance Control” option and enable it
- Select impedance model:
- Microstrip (outer layer, single-ended)
- Stripline (inner layer)
- Coplanar waveguide
- Differential pair (any of the above)
- Enter your target impedance value (e.g., 50 ohm, 90 ohm, 100 ohm)
- JLCPCB will calculate the required trace width based on your selected stackup and adjust manufacturing parameters accordingly
- In your PCB design notes, mark which traces are impedance-controlled. JLCPCB may contact you to confirm which specific nets/layers apply.
- Cost: Impedance control at JLCPCB adds $0 for standard service — it is free as of 2026!
Design Tips for Controlled Impedance Traces
- Continuous reference plane: The GND plane under your impedance-controlled trace must be continuous — no splits, slots, or cutouts. Any discontinuity causes impedance mismatch.
- Avoid layer changes: Each via transition adds parasitic inductance and capacitance. Minimise layer changes for impedance-controlled traces. When unavoidable, use via stitching (GND vias near the signal via) to maintain reference continuity.
- Trace width consistency: The entire length of an impedance-controlled trace must maintain the same calculated width. Necks (narrow sections through pads) create impedance bumps.
- Match pair routing: For differential pairs, route both traces identical in length, width, and bend angle. Skew (length mismatch) causes signal timing issues.
- Trace length matching: For USB 2.0 differential pairs, D+ and D- must be matched within 200 mil (5mm). For PCIe, within 5 mil (0.127mm).
- Terminate at both ends: RF traces must be terminated at source and load with matching impedance (e.g., 50 ohm source termination + 50 ohm load for maximum power transfer).
Testing and Validation
How to verify impedance control after receiving your PCBs:
- TDR (Time Domain Reflectometry): Professional test method. Sends a fast rise-time pulse and measures reflections. Expensive equipment (Rs 5-20 lakh for dedicated TDR).
- VNA (Vector Network Analyser): Measures S-parameters of traces. NanoVNA (Rs 2,000-4,000) provides basic VNA function for checking antenna impedance matching. Suitable for basic RF trace verification.
- JLCPCB impedance test coupon: JLCPCB includes a test coupon on your panel (or can add one) that is measured with TDR at their factory. Report provided with order.
Frequently Asked Questions
Do I need impedance control for an ESP32 WiFi project?
Only for the antenna trace (from ESP32 antenna pin to PCB antenna or u.FL connector). This 50-ohm trace should be microstrip controlled impedance. All other ESP32 traces (SPI, I2C, UART, GPIO) at normal speeds do not need impedance control.
What is the standard 50-ohm trace width for JLCPCB 2-layer board?
For a standard JLCPCB 2-layer 1.6mm FR4 board with 1oz copper: approximately 2.8-3.2mm trace width for 50-ohm microstrip on F.Cu. JLCPCB’s stackup-specific calculator on their website gives the exact value for their current manufacturing process.
Does impedance control add to cost at JLCPCB?
No. As of 2026, JLCPCB provides impedance control as a free service. You simply enable it and specify your target impedance. They adjust manufacturing parameters and include a test coupon. This is a significant advantage over other manufacturers who charge $20-50 for impedance control.
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