SMD Footprint Creation in KiCad: Custom Component Library
When you design a PCB in KiCad, every component needs two things: a schematic symbol (the logical representation) and a footprint (the physical pad layout on the PCB). KiCad comes with thousands of footprints in its standard library, but you will inevitably encounter a component that is not there — a custom sensor, a niche IC, or a proprietary connector. Creating your own SMD footprint is a core skill for any serious PCB designer.
This tutorial walks through the complete process of creating a custom SMD footprint in KiCad, from reading the datasheet to building a reusable component library.
Why Create Custom Footprints?
The standard KiCad library covers most generic packages (SOT-23, SOIC-8, QFP-100, etc.) but misses:
- Components with non-standard pin spacing or unusual package variants
- New or niche ICs (sensor modules, specialized power management, custom connectors)
- Components from Chinese suppliers with slight dimensional variations from standard IPC footprints
- Proprietary modules (ESP32 modules, Waveshare boards mounted as components)
- Mechanical components (mounting bosses, thermal pads, RF shields)
A well-made custom footprint in a personal library saves time across all future projects and prevents assembly errors.
Reading the Datasheet Package Drawing
Every SMD component datasheet includes a “Package” or “Mechanical” drawing. This section contains all dimensions needed to create the footprint. Key values to extract:
Land Pattern vs Physical Dimensions
Component datasheets often provide two types of dimensions:
- Physical body dimensions: The actual size of the component body (D, E dimensions)
- Recommended land pattern / PCB footprint: The pad dimensions and positions the manufacturer recommends for soldering. Use these when available.
If the datasheet does not include a recommended land pattern, use IPC-7351 standard calculations or the IPC Calculator tool.
Key Dimensions to Record
- Pad size (X by Y): length and width of each pad
- Pad pitch: center-to-center distance between adjacent pads
- Row span (e1): center-to-center distance between pad rows (for ICs)
- Number of pins and pin numbering direction
- Courtyard extension: typically 0.25-0.5mm beyond the physical component body
Example: SOT-23-5 Dimensions
| Parameter | Value |
|---|---|
| Pad size | 0.6 x 1.0 mm |
| Pitch (side) | 0.95 mm |
| Row span (e1) | 2.6 mm |
| Body size | 1.6 x 2.9 mm |
| Courtyard | 0.25mm extension |
Footprint Anatomy
A KiCad footprint consists of:
- Pads: The copper areas where component leads are soldered
- F.Cu / B.Cu: Copper layer for the pads
- F.SilkS: Silkscreen for component outline and reference
- F.Fab: Fabrication layer (component outline and values — not printed on PCB)
- F.CrtYd (Courtyard): Keepout boundary for DRC clearance checking
- Reference (REF***): Placeholder for component reference (R1, U3, etc.)
- Value (VALUE): Placeholder for component value or part number
Opening the KiCad Footprint Editor
- In KiCad main window, click “Footprint Editor” (or open from PCB Editor: Tools > Footprint Editor)
- To create a new library: File > New Library > Give it a name (e.g., “zbotic-custom”) > Save as Project library (saves in your project folder) or Global library
- To create a new footprint: File > New Footprint > Enter footprint name matching your component (e.g., “SOT-23-5_Bourns_MFP32” or use standard naming: PACKAGE_MANUFACTURER_PARTNO)
- Set footprint properties: Footprint Properties dialog > Set Reference text and Value text sizes to 1.0mm/0.15mm stroke
KiCad Footprint Naming Convention
Standard naming: Package_Type:PACKAGE_Description
Examples:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
Package_QFP:QFP-32_7x7mm_P0.8mm
Connector_JST:JST_PH_S2B-PH-K_1x02_P2.00mm_Horizontal
For custom: Use your company/project prefix:
zbotic:SOT-23-5_Sensirion_STS40
Creating SMD Pads
Step-by-Step: Two-Row IC (e.g., SOIC-8)
- In Footprint Editor, press ‘A’ or go to Place > Add Pad
- Click on canvas to place first pad
- Pad properties dialog opens — set:
- Pad type: SMD (no hole)
- Shape: Rectangle for end pads, or Rounded Rectangle for IPC compliance
- Size: from datasheet recommended land pattern (e.g., 0.6 x 1.75mm for SOIC-8)
- Copper layers: F.Cu only for SMD top-side pads
- Pad number: 1
- Place pad at coordinate X = -pitch*3/2, Y = -e1/2 (pin 1 for SOIC-8)
- Duplicate pad (Ctrl+D), change pad number to 2, shift X by pitch
- Repeat for remaining pads on the same row
- Mirror and place pads on opposite row (pins 5-8 for SOIC-8), with Y = +e1/2
- For pads on the opposite row: number right-to-left (IPC standard for dual-row packages)
Using the Pad Array Tool
For packages with many pins (QFP, connector strips), use KiCad’s pad array tool:
- Place one pad manually
- Select it and go to Edit > Create Pad Array (or right-click > Create from Selection > Create Array)
- Set: Number of pads, pitch, direction (horizontal/vertical)
- KiCad auto-numbers pads sequentially
Thermal Pad (Exposed Pad)
Many power ICs and QFN packages have an exposed thermal pad on the bottom center. Add this as an additional SMD pad:
- Pad type: SMD
- Shape: Rectangle (matching thermal pad dimensions from datasheet)
- Add via holes in thermal pad: Add PTH vias within the pad area for thermal relief to inner ground planes
- Thermal pad number: Usually the highest pin number (e.g., pad 9 for an 8-pin IC with thermal pad, or pad 33 for a 32-pin QFN)
KiCad Pad Placement Tips
- Use exact coordinates from the datasheet — do not eyeball positions
- Enter coordinates in pad properties dialog X,Y fields for precision
- Zoom in to 1:1 scale with a ruler to verify dimensions look correct
- Use KiCad’s measurement tool (Inspect > Measurement Tool) to verify pad-to-pad distances
Courtyard and Fab Layers
F.Fab Layer (Component Outline)
Draw the physical component body outline on F.Fab:
- Use the physical body dimensions from the datasheet
- Draw a rectangle (or polygon for irregular shapes) centered on the footprint origin
- Line width: 0.1mm
- Add pin 1 indicator: small triangle or dot at pin 1 corner on F.Fab
- This layer is informational — it does not appear on the manufactured PCB
F.SilkS Layer (Silkscreen)
Draw a simplified outline on F.SilkS:
- Outline must not overlap pads (leave at least 0.15mm clearance)
- Common approach: draw only the outline segments that are visible after component placement
- Add pin 1 indicator (dot or arrow) at pin 1
- Line width: 0.12mm minimum, 0.15mm recommended
F.CrtYd Layer (Courtyard)
The courtyard defines the component keepout zone for DRC:
- Draw a rectangle enclosing ALL pads and the component body
- IPC-7351 specifies 0.25mm extension beyond the furthest pad edge for Class B (most PCBs)
- Use 0.5mm extension for densely packed boards to ensure clearance between adjacent components
- Line width: 0.05mm (thin line that is clearly distinguished from other layers)
- Courtyards must not overlap in the final PCB layout (DRC enforces this)
Adding a 3D Model
KiCad can display a 3D view of the assembled PCB if each footprint has an associated 3D model (.step or .wrl file). For custom footprints:
- Search SnapEDA, UltraLibrarian, or Component Search Engine for your component — many provide free KiCad footprints with 3D models
- Download the .step file and place it in your project’s 3D models folder
- In Footprint Editor: Footprint Properties > 3D Models tab > Add file path
- Adjust scale, rotation, and offset to align the 3D model with your footprint pads
Library Management
Creating a Project Library
For custom footprints used in a single project:
- Save library in the project folder: myproject/myproject.pretty/
- KiCad automatically adds project libraries to the library table
- Version control the .pretty folder in git with your project
Creating a Global Custom Library
For footprints reused across multiple projects:
- Create a global library directory: ~/KiCad/custom-footprints.pretty/
- Add to KiCad’s global footprint library table: Preferences > Manage Footprint Libraries > Global Libraries tab
- This library is available in all your KiCad projects
Sharing Footprints
Custom footprint libraries can be shared as .pretty directories on GitHub or Bitbucket. Teams can link shared libraries via git submodules or by adding the shared path to their library table.
Components to Prototype Your KiCad Design
After designing your PCB in KiCad, test your design logic with these development boards before committing to fabrication:
- Arduino UNO R3 — Breadboard-friendly platform for validating circuit logic before PCB spin
- Waveshare ESP32-S3 Nano — Compact module you may want to design into a custom PCB carrier
- ESP8266 WiFi Relay Module — IoT module for testing wireless-enabled PCB designs
Common SMD Package Reference
| Package | Pitch | Pad Size | Body Size |
|---|---|---|---|
| SOT-23-3 | 0.95mm (2-pin side) | 0.6 x 1.1mm | 1.3 x 2.9mm |
| SOT-23-6 | 0.95mm | 0.6 x 1.0mm | 1.6 x 2.9mm |
| SOIC-8 | 1.27mm | 0.6 x 1.75mm | 3.9 x 4.9mm |
| SOIC-16 | 1.27mm | 0.6 x 1.75mm | 3.9 x 9.9mm |
| QFP-32 (0.8mm) | 0.8mm | 0.4 x 1.7mm | 7 x 7mm |
| QFN-32 (0.5mm) | 0.5mm | 0.3 x 0.85mm | 5 x 5mm |
| LGA-12 | 0.65mm | 0.4 x 0.55mm | 2.5 x 2.5mm |
Footprint QC Checklist
- Pad dimensions match datasheet recommended land pattern
- Pad pitch matches datasheet (verify with KiCad Measurement Tool)
- Pad numbering is correct (pin 1 matches component pin 1)
- Pin 1 indicator visible on F.Fab and F.SilkS
- F.Fab outline matches physical body size
- Courtyard encloses all pads with minimum 0.25mm extension
- Silkscreen does not overlap any pads
- Reference and Value text are outside courtyard
- Reference text height 1.0mm, stroke 0.15mm
- Footprint origin is at geometric center (or specified reference point)
- 3D model aligned (if added)
- Footprint saved to correct library
- Test footprint in a dummy PCB layout with DRC — no violations
Frequently Asked Questions
Where do I find component footprints for KiCad?
First check the KiCad standard library (covers 90% of common components). For custom or rare parts, try SnapEDA (free, direct KiCad export), UltraLibrarian, Component Search Engine (componentsearchengine.com), or the manufacturer’s website which sometimes provides KiCad footprints. If none available, create manually from the datasheet.
What is the difference between F.Fab and F.SilkS in KiCad?
F.Fab is a documentation layer visible only in your CAD tool — it does not get printed on the manufactured PCB. It typically shows the full component outline and pin numbers. F.SilkS is printed on the physical board as white (or black) ink. For the Gerber export, only F.SilkS becomes the printed silkscreen; F.Fab stays in the design file for assembly documentation.
How do I set the footprint origin point?
Convention varies by package type. For most ICs, center the origin at the geometric center of all pads. For polarized components (diodes, caps), some designers center on pin 1. For through-hole components, center on hole 1. The origin determines where the footprint snaps during placement, so a well-chosen origin makes PCB layout easier.
Can I import footprints from Altium or Eagle into KiCad?
KiCad 7+ includes importers for Eagle .lbr library files. For Altium footprints, use the Altium-to-KiCad converter script (available on GitHub) or intermediate conversion through EasyEDA. SnapEDA also provides unified export for multiple EDA formats including KiCad.
How do I handle QFN packages with thermal pads in KiCad?
Add the thermal pad as a regular SMD pad with the highest pin number (or the special EP designation). Use the copper zone fill inside the thermal pad rather than solid copper — this helps with solder paste coverage. Add vias within the thermal pad for better thermal transfer to inner ground planes. Use the KiCad footprint wizard for common QFN sizes as a starting point.
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